9 GOLDEN GROVES, RYDE, PO33 3UR. TELEPHONE: 01983 - 61 61 64
EMAIL: EJS@CLARA.NET
PROFESSIONAL QUALIFICATION: AMIEE.
PROFESSION: Electronics / Software Engineer.
EDUCATION:
Maintenance, fault finding and repair of computer communications equipment. Electronic fault finding on military radio sets. Software Development of medium to large systems using mainly C/C++, Visual C++ MFC. But also Pascal, FORTRAN, COBOL, Basic on various hardware systems. Applications include Bus Time Scheduling, Share/Unit trust price recording system, file editors.
OTHER INTERESTS:
Technology; Electronics, Software, Learning. Interest in CAD packages, internal workings, internal representation of data in CAD.
Recently written/amended and fault-found and tested various programs written in Visual C++ MFC at Beacon Technology, for implementation in future projects.
A Share/Unit trust price recording and reporting system for DOS with screen graphics interface, I'm developing a replacement for Windows95 in my spare time. Several other systems involving representing data object with use of dynamic storage allocated digraph structures. Experience with processing of visual images in storage as 3rd year assignments.
Fault finding in electronic systems to component levels on Complex Radio system used by the military including Analogue/ Digital conversion and encryption. Diagnose faults on Computer communication products: internal, external and PCMCIA technologies, with aid of manufacturer's diagnostics packages, then further down to component level.
Technologies include: Maintenance of Ethernet 802.3 including PrintServer cards, Token-Ring LANs, Knowledge of: FDDI, Orwell, (Token Ring network), DBDQ (Bus network layout)
UNIVERSITY PROJECT 1: DIGITAL OSCILLOSCOPE.
Design and building a prototype Digital Storage
Oscilloscope. The purpose of which is to get a steady
display of all waveforms at any triggered moment of time
including when waveforms were not periodic. The input
would be sampled, converted to digital to be stored in
RAM until a steady display was triggered on a control line
which will retrieve and convert back to analogue and scaled
to Y drivers on CRT. The X driver being fed from ramp
waveform from timebase circuit.
UNIVERSITY PROJECT 2: 4 BIT ALU AND 4 REGISTERS
The ALU was designed in modular CMOS; First the basic
full adder was conceived then tabulated, then logic was added
so that it can perform full 4 bit addition, subtraction by
complementary addition and the basic logic functions:
OR, AND, NOR, NAND. XOR and compare. Storage registers are
made up of tabulated back to back CMOS Nand gates.
To contact EJS technology - Email : EJS@CLARA.NET